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| september 2011 doc id 019041 rev 1 1/24 AN3432 application note how to choose a bypass diode fo r a silicon panel junction box introduction today, the main technologies used in solar panel are polycrystalline and mono crystalline silicon solar cells. when one solar cell of th e panel is shaded while the others are illuminated, a hot spot could appear and leads to the shade d cell destruction. the bypass diode is an efficient solution to eliminate the ?hot spot? and maintain the current delivery. the schottky diode is a cost effective candidate. its v rrm , v f /i r trade off need to fit the panel and junction box characteristics. this document gives a method to select the most appropriate diode versus the panel characteristics. www.st.com
contents AN3432 2/24 doc id 019041 rev 1 contents 1 photocurrent production basics of silicon solar cells . . . . . . . . . . . . . 3 1.1 the photovoltaic effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 the solar cell model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 main parameters of solar cells . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.3.1 short circuit current (i sc ) and open circuit voltage (v oc ) . . . . . . . . . . . . . . 4 1.3.2 v oc and i sc variations with ambient temperature . . . . . . . . . . . . . . . . . . . 5 1.4 hot spot phenomenon . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 bypass diode inside the junction box . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 bypass function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 junction box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 v rrm is the first rating criterion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3.1 maximum number of solar cells to bridge with bypass . . . . . . . . . . . . . . 9 2.3.2 v rrm of bypass diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 application constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 constraints linked with the junction box characteristics . . . . . . . . . . . . . . 11 3.1.1 power losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.2 thermal runaway risk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2 constraints linked with reliability test . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2.1 thermal test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2.2 200 cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4 optimized bypass diode for a given sola r panel or junction box . . . . 20 5 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 AN3432 photocurrent production basics of silicon solar cells doc id 019041 rev 1 3/24 1 photocurrent production basics of silicon solar cells 1.1 the photovoltaic effect to generate a current through a semi conductor, some energy is required to extract the electron from the valence band to the conduction band. this energy is greater than material band gap energy ( e gap ) . thus in case of silicon solar cell, if th e photon energy (sunlight carrier) e = h is higher than the silicon band gap energy e gap =1.12ev, the electrons migrate through a pn junction . figure 1. current generation through a semiconductor 1.2 the solar cell model silicon solar cell creates a photocurre nt called i l that is proportiona l to illumination and independent of output cell voltage. however, when this voltage increases, a part of this current is dissipated in p-n junction. this is why the equivalent model, shown in figure 2 , consists in a current generator (photocurrent), a diode (intrinsic p-n junction), two resistances r p (parallel resistance: models the noise current between top and bottom of the solar cell) and r s (series resistance: simulates the materials and contact losses). conduction band valence band e = h > e gap e(ev) e v e c e= e-e gap c v forbidden area photocurrent production basics of silicon solar cells AN3432 4/24 doc id 019041 rev 1 figure 2. silicon solar cell equivalent diagram the circuit model shown on figure 2 gives the solar cell current (i(v)) versus the solar cell output voltage (v) equation 1 where: i 0 is the reverse bias saturation current, depending on cell die and junction characteristics k is the boltzmann constant: 1.38.10 -23 q is the electron charge 1.602.10 -19 c t is the temperature in k 1.3 main parameters of solar cells 1.3.1 short circuit current (i sc ) and open circuit voltage (v oc ) the solar cells or panel are usually characterized by their short circuit current (i sc ) and their open circuit voltage (v oc ). the short circuit current (i sc ) is the current generated by the solar cell or panel when output voltage of the cell or panel is set to 0 v. equation 2 r s /r p and r s being negligible, the short circuit current is close to the photocurrent i l generated by the cell and is the maximum possible current generated by the cell for a fixed illumination. solar cell equivalent diagram v i(v) r load i l i rp rp rs v d i d ) (v i i i i rp d l + + = () p s s 0 l r ) ) r ) v ( i v ( ( 1 kt r ) v ( i v q exp i i ) v ( i + ? ? ? ? ? ? ? ? + ? = i l = i sc + i sc + i o (exp r s r p q kt i sc r s ) - 1) ( AN3432 photocurrent production basics of silicon solar cells doc id 019041 rev 1 5/24 equation 3 the open circuit voltage (v oc ) is the voltage corresponding to the output current of solar cell or panel set to 0. the photocurrent is equal to the current lost in the intrinsic element of the cell, and v oc is equal to the intrinsic diode forward voltage (v d ). equation 4 equation 5 in the following, for easier the reading, v oc is the open circuit voltage of the panel and v oc_u the open circuit voltage of the solar cell. the relation between them is given in equation 6 . equation 6 where nb is the number of cells contained in one panel. 1.3.2 v oc and i sc variations with ambient temperature the open circuit voltage is mainly linked with the parasitic diode forward voltage then it is temperature dependent with a negative temperature coefficient ( v oc ). then the maximum value for v oc is the value at minimum junction temper ature specified in the panel data sheet. strongly linked with the photocurrent, the short circuit current increases slightly with the temperature ( i sc >0). figure 3. temperature effect on i sc and v oc parameters i sc ~ i l i l = i o (exp v oc r p q kt v oc ) - 1) - ( v oc =v d v oc = nb i = 1 v oc_u_i i(v) v v (t2) oc v (t1) oc v ~ -0.4% / c oc i (t2) sc i (t1) sc i ~ + 0.05% / c sc t> 2 t 1 photocurrent production basics of silicon solar cells AN3432 6/24 doc id 019041 rev 1 considering the example of a 190 w solar panel. in standard test conditions (stc) @t amb = 25 c, v oc = 33 v, i sc = 7.89 a: i sc = 0.05%/c; v oc = -0.4%/c at an operating temperature range of -40 c, 85 c. that is, the v oc deviation is 26% versus v oc (stc) then, i sc max is 3% higher than i sc (stc) 1.4 hot spot phenomenon the hot spot phenomenon happens when one cell of the panel is shaded while the others are illuminated, and when this shaded cell is not able to exhaust its generated power dissipation. the shaded cell behaves as a diode polarized in reverse and generates reverse power p s . the other cells generate a current that flows through the shaded cell and the load r load. any solar cell has its own critical power dissipation p c that must not be exceeded and depends on its cooling and material structures, its area, its maximum operating temperature and ambient temperature. a shaded cell may be destroyed when its reverse dissipation exceeds p c . this is the hot spot. the manufacturers usually define a breakdown voltage v c . its value depends on the solar cell technology (poly-silicon or mono -silicon) and the manu facturing process. v oc (-40 c) = 33 + v oc (-40 c) = v oc max = 41.6 v 33 -0.4 100 (-40 -25) i sc (85 c) = 7.89 + i sc (85 c) = i sc max = 8.13 a 7.89 0.05 100 (85 - 25) AN3432 photocurrent production basics of silicon solar cells doc id 019041 rev 1 7/24 figure 4. hot spot phenomenon there is no risk of hot spot while: equation 7 to eliminate the hot spot phenomenon, a dedicated circuit should bypass the partially shaded module and eventually it should maintain the operation of the other pv modules creating a path for their current. v cell i(v) v g -vs r load 1000w/m2 voltage (v) -vs shadowed cell characteristics i(v) v g (n-1) v oc_u (n-1) illuminated cell characteristics -v c hot spot 0 ) ( ) ( ) ( v i v p v i v p v i r v v c c s s load s g = = = - v oc_u current (a) c s p p < bypass diode inside the junction box AN3432 8/24 doc id 019041 rev 1 2 bypass diode inside the junction box 2.1 bypass function the bypass diode principle is to use a diode in reverse paralleling with several solar cells (see figure 5 ). the bypass diode is blocked when all cells are illuminated, and conducts when one or several cells are shadowed. figure 5. bypass diode working phases 2.2 junction box bypass diodes are rarely mounted directly on the solar panel. they are soldered in a so called junction box that is placed at the rear of the solar panel. most of the time, it contains three diodes in series as explained in paragraph 2.3.1. the junction box design has a significant impact on the thermal diode performance. when qualified without solar module, the junction box has to meet din v vde v 0126-5:2008 standard requirements. when qualified with its solar module, the standard is en61215. v cell v bypass =- nv cell v bypass =v f bypass off bypass on n= number of cells per bypass diode v cell v cell v cell cell s f v n v v) 1 (- - = v cell v cell v s v cell AN3432 bypass diode inside the junction box doc id 019041 rev 1 9/24 figure 6. solar system diagram ideally, a bypass diode should have a forward voltage ( v f ) and a leakage current ( i r ) as low as possible. however, these are conflicting objectives. special care needs to be taken to eliminate any risk of thermal runaway. the junction box manufacturers use schottky diode for its low forward voltage. the choice of maximum reverse voltage is made versus the number and voltage of the solar cells in series. then the trade off ?conduction voltage v f /reverse current i r ? is selected according to the total power losses ratings. 2.3 v rrm is the first rating criterion the maximum repetitive reverse voltage (v rrm ) of the bypass diode is directly linked with the number of cells bridged by the bypass diode. 2.3.1 maximum number of solar cells to bridge with bypass the maximum number of cells to bridge is defined by the breakdown voltage (v c ). the literature gives breakdown voltage (v c ) range for the poly-silicon cells from 12 v to 20 v. for mono-silicon cells the breakdown voltage extends up to 30 v. for an efficient oper ation, there are two conditions to fulfill: bypass diode has to conduct when one cell is shadowed. the shadowed cell voltage v s must stay under its breakdown voltage (v c ). it is defined by the cell manufacturer and is the minimum value of the manufacturing distribution. the maximum number of solar cells (n max ) to bridge is calculated using both these conditions: solar panel junction box inverter bypass diode inside the junction box AN3432 10/24 doc id 019041 rev 1 equation 8 figure 7. maximum numbers of solar cells to bridge with bypass diode considering poly-silicon solar ce lls with a breakdown voltage v c of 12 v and a bypass diode forward voltage v f of 0.5 v, the maximum number n max of solar cells bridged by the bypass diode is 24. this is the common setting used by module manufacturers. 2.3.2 v rrm of bypass diode knowing the number of bypass diodes nd and the v oc of the panel, the maximum repetitive reverse voltage (v rrm ) of the bypass diode can be calculated. in the worst case, the bypass diode reverse voltage is equal to the open circuit voltage (v oc_max ) of the solar panel divided by the number of bypass diodes nd. v oc_max is the open circuit voltage at the minimum ambient temperature with the maximum irradiance. equation 9 where dt% = average voltage dispersion, which depends on the panel manufacturer. most of the time, the junction box manufacturer is different from the solar panel manufacturer. then the junction box is not dedicated to one panel, but it could be used with any solar panel power range up to 400 w. for a 400 w panel with a total v oc of 85 v in stc, its highest voltage is v oc (-40c) = 107 v (see section 1.3.2 ). if the deviation tolerance dt% is 20% (average dispersion estimate given in the literature) and 3 bypass diodes are used in the junction box, the reverse voltage of each bypass diode is 43 v, then v = 45 v is selected. this is probably the reason why the diode with a v rrm = 45 v is the most widely used in the junction boxes. 1 5 . 0 v v n 5 . 0 ) 1 n ( v v v 5 . 0 v v v with v ) 1 n ( v v f c max max c f u _ oc c s u _ oc s bypass + ? < ? ? ? < < ? ? ? = v v f bypass = v bypass =v f 0.5v 0.5v v s 0.5v v oc max = v oc (t jmin ) (1 + dt%) v rrm > v oc max nd AN3432 application constraints doc id 019041 rev 1 11/24 3 application constraints 3.1 constraints linked with the junction box characteristics the forward voltage induces conduction losses (p cond ) and leakage current induces reverse losses (p rev ). the best trade off needs to take into account: solar panel efficiency impact thermal runaway risk (directly linked with power losses) compatibility with flash test thermal test (linked with forward voltage) thermal cycling test 3.1.1 power losses diode conduction losses when the diode is conducting in dc mode, it s forward voltage causes power losses called p cond . these losses represent the most part of the total power losses and decrease when the junction temperature increases. the application note an604 describes the way to calculate them: equation 10 considering a solar panel built with 48 cells in series, divided in two sets of 24 cells protected by one bypass diode each. if one cell of the first set is shadowed while the other 47 cells are fully illumi nated, the bypass diode of the sh adowed set is cond ucting, and the bypass diode of the second set is in reverse bias. the second set generates a current i pm while the first set sinks the reverse current i s of the shaded cell. then the conduction losses are: equation 11 the maximum loss calculations are made with the current through the bypass diode equal to the maximum photocurrent i sc . equation 12 figure 8 shows the maximum conduction losses for two different types of diodes: stps20l45 (low forward voltage) stps2045 (lower leakage current and higher forward voltage than stps2045) ? i i i i ) t , i ( v ) t ( p j f j cond = = f f f pm s ) i i )( t , i i ( v ) t ( p s pm j s pm f j cond ? ? = max ) i )( t , i ( v ) t ( p sc j sc f j cond application constraints AN3432 12/24 doc id 019041 rev 1 figure 8. stps20l45c and stps2045c conduction losses versus junction temperature for a first consideration the lower is the forward voltage the higher is the efficiency. however, for a schottky diode, a lower forward voltage causes a higher leakage current. this is its main technological trade off. diode reverse losses when the diode is reversed bias, all the cells bridged by the diode generate photocurrent. most of the time, in bypass application, the leakage current induces reverse losses. they increase with the junction temperature and can be calculated using equation 13 . equation 13 0 1 2 3 4 5 6 7 8 9 10 -40 -20 0 20 40 60 80 100 120 140 160 180 200 p cond (w) stps2045c stps20l45c i sc = 8 a t j (c) ) c 125 tj ( c r r r j rev e ) c 125 , v ( i v ) t ( p ? = AN3432 application constraints doc id 019041 rev 1 13/24 figure 9. stps20l45c and stps2045c reverse losses versus junction temperature the reverse losses curves, shown in figure 9 , are calculated in the following application conditions: p panel = 400 w at t amb = 85 c, 3 bypass diodes, v oc(stc) = 85 v to calculate the maximum reverse voltage v rrm , use the method described in section 2.3.2 . v r = 25 v, t j = t amb p rev_2045 (85 c) = 0.014 w p rev_20l45 (85 c) = 0.13 w in application conditions, the solar module efficiency lost due to bypass diodes is around 0.05% for stps20l45 and 0.004% for stps2045. the diode with the lower forward voltage (stps20l45c) has the drawback of a higher leakage current. the consequence is not visible on power module efficiency due to the low level contribution of the bypass diode reverse losses. however, it impacts the diode choice since the leakage current is directly linked with thermal runaway risk. to avoid this phenomenon the choice of a diode with higher forward voltage is mandatory as described in section 3.1.2 . 0 1 2 3 4 5 6 7 8 9 10 -40 -20 0 20 40 60 80 100 120 140 160 180 200 p rev (w) stps2045c stps20l45c v r = 25 v t j (c) application constraints AN3432 14/24 doc id 019041 rev 1 3.1.2 thermal runaway risk the thermal runaway results in the loss of te mperature control, du e to the inability to exhaust the power losses generated by the diode operation. in the bypass diode application, the most critical case is when the diode conducts and suddenly turns off. at this specific time t 0 the following rule is app lied to eliminate thermal runaway risk: equation 14 the junction temperature depends on the junction box thermal resistance between ambient temperature (t a ) and diode case temperature (t c ) and the thermal resistance between the diode junction and the diode case, given in the diode datasheet as the r th(j-c) parameter. the power losses and these parameters are linked by the thermal law. equation 15 and the conduction losses are given by: equation 16 a graphical interpretation is presented in figure 10 with stps20l45c diode, the current is 8 a, the ambient temperature is 60 c, r th(c-a) = 3 c/w, r th(j-c) = 1.3 c/w. the green curve is the heat power that the junction can dissipate. the blue curve is the conduction losses generated by the diode. the curves cross point gives the junction temperature at the specific time t 0 . in this condition, the junction temperature t j@t0 = 70 c is shown in figure 10 . ) t ( p j@to cond j@to rev ) t ( > p j thermal ) = t ( p (t j -t a ) r th(j-c) + r th(c-a) ) t ( p j@to cond j@to thermal ) t ( = p sc j sc f j cond i ) t , i ( v ) t ( p = AN3432 application constraints doc id 019041 rev 1 15/24 figure 10. t j @ t 0 in case of stps20l45c (t amb = 60 c, r th(j-a) = 4.3 c/w) by adding the reverse losses curve on the chart, equation 14 is respected. figure 11. thermal runawa y risk for stps20l45c (t amb = 60 c, r th(j-a) = 4.3 c/w) as shown in figure 11 , there is no risk of thermal runaway since the operation of the diode moves from the blue curve to the red curve then slips to th ermal equilibrium close to the ambient temperature (60 c) in another example, if the junction box presents a r th(c-a) = 30 c/w, with an ambient temperature around 85 c, there is a risk of thermal runaway as shown in figure 12 . 0 1 2 3 4 5 6 7 8 9 10 - 40 - 20 0 20 40 60 80 100 120 140 160 180 200 p (w) p cond (t j ) p thermal (t j ) t j @t 0 =70 c t j (c) 0 1 2 3 4 5 6 7 8 9 10 -40 -20 0 20 40 60 80 100 120 140 160 180 200 p(w) p thermal (t j ) no thermal runaway risk p rev (t j @t 0 )< p cond (t j @t 0 ) tj@t 0 =70 c p cond (t j ) p rev (t j ) t j (c) application constraints AN3432 16/24 doc id 019041 rev 1 figure 12. thermal runawa y risk for stps20l45c (t amb = 85 c, r th(j-a) = 31.3 c/w) as shown on figure 12 , the junction temperature is 152c in conduction. at turn-off this temperature would generate initial losses of 9. 5 w making the equilibrium point impossible since both temperature and leakage will increase in a thermal runaway manner due to the poor cooling. to solve this problem, there are two options: reduce the thermal resistance r th(c-a) of the junction box (modify geometry, change compound?) select a diode with much less leakage current as stps2045c, as shown in figure 13 , even if the junction temperature at turn off is higher than stps20l45 due to its higher forward voltage drop and power losses. therefore, there is no thermal runaway risk anymore. 0 1 2 3 4 5 6 7 8 9 10 -40 -20 0 20 40 60 80 100 120 140 160 180 200 p(w) p thermal (t j ) tj@t 0 =152 c p rev (t j ) p cond (t j ) thermal runaway p rev (t j @t 0 )>p cond (t j @t 0 ) t j (c) AN3432 application constraints doc id 019041 rev 1 17/24 figure 13. thermal runawa y risk for stps2045c (t amb = 85 c, r th(j-a) = 31.3 c/w) 0 1 2 3 4 5 6 7 8 9 10 -40 -20 0 20 40 60 80 100 120 140 160 180 200 p(w) p thermal (t j ) tj@t 0 =164 c p rev (t j ) p cond (t j ) no thermal runaway risk p rev (t j @t 0 )< p cond (t j @t 0 ) t j (c) application constraints AN3432 18/24 doc id 019041 rev 1 3.2 constraints linked with reliability test 3.2.1 thermal test this test is defined in en61215 and in din v vde v 0126-5:2008 in two steps as described in figure 14 . figure 14. thermal test synopsis using equation 17 and equation 18 it is possible to evaluate if the requirements of en61215 can be met. equation 17 to meet the test requirements (t j < t j max) the following conditions apply: p cond (t j ) < p thermal (t j ) then the maximum forward voltage is equation 18 incoming measurements measure v ,i ,v at 25 c on by pass diode fr r test junction box @75 c 1 hour, i= i d sc t>tmax jj failed ! the junction box is not qualified t optimized bypass diode for a give n solar panel or junction box AN3432 20/24 doc id 019041 rev 1 4 optimized bypass diode for a given solar panel or junction box this section describes a method to choose the optimized bypass diode through an application example with a 400 w photovoltaic panel. its short circuit current (i sc ) is 6.4 a and a its total open circuit voltage (v oc ) is 85.3 v in stc condition s. this solar panel needs 3 bypass diodes placed in a junction box having r th(j-a) = 30 c/w. step 1: determine v rrm minimum value the highest open circuit voltage value for the solar panel (v oc ) is for the -40 c ambient temperature, that is v oc (-40 c) = 107 v, with a deviation tolerance of 20% applied. then the maximum reverse voltage applied to each bypass diode is 43 v. so the v rrm minimum value is 43 v @ -40 c. in the product range the nearest v rrm value is 45 v. step 2: diode characteristics versus application constraints the bypass diode must be compatible with the thermal test. in general its maximum junction temperature is 175 c. then the thermal losses can be calculated as: the junction box is able to dissipate 3.33 w when the junction temperature of the diode is 175 c. to meet the test requirements (t j < t j max) the following condition applies: p cond (t j max) < p thermal (t j max) with this condition the maximum forward voltage at t j max and 1.25 i sc can be calculated using equation 18 : the stps3045cg is compliant with the thermal test requirements since its v f max (8 a, 175 c) = 0.31 v the forward voltage (v f ) of a schottky diode is temperature dependent. v f decreases linearly with temperature and can be calculated using the following: then: v f max (8 a, 175 c) = -0.09 + 0.4 = 0.310 v: thermal thermal ) = ) = 3.33 w 175 c 175 c ( ( p p (175 c - 75 c) 30 ) < ) < sc f f , i (1.25 (8 a, v v (175 - 75) 30 max max 175 c 175 c 1 1.25 6.4 0.417 v ) = ) ) ) f f f f f f f (8 a, (8 a, (8 a, (8 a, v v v v v v v max max max 125 c 125 c 175 c 125 c (175 - 125 c) + with = = -1.8 mv/c - 125 -25 AN3432 optimized bypass diode for a given solar panel or junction box doc id 019041 rev 1 21/24 step 3: eliminate the risk of thermal runaway as explained in the previous section, the most critical step is the thermal runaway risk that occurs at the diode switching off. in the worst case, the diode will conduct a current very close to i sc = 6.4 a and will switch off with a reverse bias voltage equal to v oc (85 c)/ 3 = 64.83 / 3 = 21.61 v. the power conduction losses calculation gives: with: the power reverse losses are given by the following equation: then we apply the thermal law in order to find the junction temperature at switching time. thermal law and power conduction losses curves cross gives the junction temperature at switching time in figure 16 . figure 16. stps3045c thermal runaway risk analysis the junction temperature at switching off is 164 c. at this junction temperature, the reverse losses are below the conduction losses. in conclusion, there is no risk of thermal runaway with stps3045cgc. sc j sc f j cond i ) t , i ( v ) t ( p = ) 25 t ( 10 1 2 . 0 ) t ( r ) 25 t ( 10 3 . 2 51 . 0 ) t ( v i ) t ( r ) t ( v ) t , i ( v j 4 j d j 3 j 0 t sc j d j 0 t j sc f ? ? + = ? ? ? = ? + = ? ? ) 125 tj ( 06 . 0 1 j rev e 10 51 . 1 ) t ( p ? ? ? ? = j thermal ) = t ( p (t j - 85 c) 30 0 1 2 3 4 5 6 7 8 9 10 -40 -20 0 20 40 60 80 100 120 140 180 200 p(w) p thermal (t j ) tj@t 0 =164 c no thermal runaway risk p rev (t j @t 0 )< p cond (t j @t 0 ) t j (c) 160 conclusion AN3432 22/24 doc id 019041 rev 1 5 conclusion this application note provides the means to select the best bypass diode device based on junction box or pv module specifications. th is diode selection will de pend on its technology trade off - forward drop voltage versus reverse current. st offers a broad range of schottky diode from 10 to 60 a and 20 v to 45 v ratings. their low leakage current is a distinctive performance that has allowed more than 50 millio n pieces to be assembled successfully in 2011. future trends should allow the extension of their maximum temperature to 200 c while covering the increased maximum current up to 15 a for the stringent junction box thermal test. AN3432 revision history doc id 019041 rev 1 23/24 6 revision history table 1. document revision history date revision changes 06-sep-2011 1 initial release. AN3432 24/24 doc id 019041 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by two authorized st representatives, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2011 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com |
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